HDL/UP1-board page
Here are a few designs targeted for Altera's UP1-board.
They are programmed using HDLs (AHDL, VHDL and Verilog HDL).
These designs can be useful as demos for the UP1 board and HDL source examples.
They emulate some old video games.
The UP1 board runs a FLEX 10K20 at 25MHz that drives a VGA output. These designs produce a standard 640x480 video signal, so that any VGA monitor will work with them. Both the HDL source and the .sof (the file used to program the 10K20) are provided.
These are personal designs. Feel free to use them for any purpose.
Pong
Several balls are bouncing on the screen, the purpose is to send them away in the opposite direction.
This design is made mostly in AHDL, with one module made in VHDL. It uses 898 LCs (77% of the 10K20), no EAB, and has a registered performance of 40 MHz. Here are the source files.
The design is fairly well organized. Numerous state machines control the objects on the screen. The numbers of paddles, balls, scores and bumpers are parameterized.
By default, only two push buttons are wired to the 10K20, so one is used to move the left paddle up, and the other down. The right paddle controls are linked to the left one (you can wire the extra 2 push buttons on the board to the 10K20 for independent paddle control).
Worm
A worm is moving on the screen, seeking food (green dots) and trying to avoid poisonous stuff (red dots). Two push buttons are used to navigate the worm, one turns the worm clockwise, the other counterclockwise.
This design is made entirely in Verilog HDL, uses 286 LCs (24% of the 10K20), 3 EABs, and has a registered performance of 31 MHz. Here are the source files.
Here's a VGA sync test generator example in Verilog, for those who want to get a quick start with the UP1.
UP1 related links:
| Altera's Home | Video and VHDL Demo Files |
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